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ADT7468
VID CODE MONITORING
The ADT7468 has five dedicated voltage ID (VID code)
inputs. These are digital inputs that can be read back through
the VID register (Reg. 0x43) to determine the processor voltage
required or being used in the system. Five VID code inputs
support VRM9.x solutions. In addition, Pin 21 (12 V input)
can be reconfigured as a sixth VID input to satisfy future
VRM requirements.
VID CODE REGISTERS
VID Code Register 0x43
<0> = VID0, reflects the logic state of Pin 5.
<1> = VID1, reflects the logic state of Pin 6.
<2> = VID2, reflects the logic state of Pin 7.
<3> = VID3, reflects the logic state of Pin 8.
<4> = VID4, reflects the logic state of Pin 19.
<5> = VID5, reconfigurable 12 V input. This bit reads 0 when
Pin 21 is configured as the 12 V input. This bit reflects the logic
state of Pin 21 when the pin is configured as VID5.
<6> THLD = 0, VID switching threshold = 1 V,
V OL < 0.8 V, V IH > 1.7 V, V MAX = 3.3 V
THLD = 1, VID switching threshold = 0.6 V,
V OL < 0.4 V, V IH > 0.8 V, V MAX = 3.3 V
<7> VIDSEL = 0, Pin 21 functions as a 12 V measurement
input. Software can read this bit to determine that there are five
VID inputs being monitored. Bit 5 of Register 0x43 (VID5)
always reads back 0. Bit 0 of Status Register 2 (Reg. 0x42)
reflects 12 V out-of-limit measurements.
VIDSEL = 1, Pin 21 functions as the sixth VID code input
(VID5). Software can read this bit to determine that there are
six VID inputs being monitored. Bit 5 of Register 0x43 reflects
the logic state of Pin 21. Bit 0 of Status Register 2 (Reg. 0x42)
VID Code Input Threshold Voltage
The switching threshold for the VID code inputs is approxi-
mately 1 V. To enable future compatibility, it is possible to
reduce the VID code input threshold to 0.6 V. Bit 6 (THLD)
of the VID register (Reg. 0x43) controls the VID input
threshold voltage.
Reconfiguring Pin 21 as VID5 Input
Pin 21 can be reconfigured as a sixth VID code input (VID5)
for VRM10-compatible systems. Because the pin is configured
as VID5, it is not possible to monitor a 12 V supply.
Bit 7 of the VID register (Reg. 0x43) determines the function of
Pin 21. System or BIOS software can read the state of Bit 7 to
determine whether the system is designed to monitor 12 V or is
monitoring a sixth VID input.
Status Register 2 (Reg. 0x42
<0> 12 V/VC = 0, if Pin 21 is configured as VID5, then Logic 0
denotes no change in VID code within the last 11 μs.
<0> 12 V/VC = 1, if Pin 21 is configured as VID5, then Logic 1
means that a change has occurred on the VID code inputs
within the last 11 μs. An SMBALERT is generated, if this
function is enabled.
VID Code Change Detect Function
The ADT7468 has a VID code change detect function. When
Pin 21 is configured as the VID5 input, VID code changes can
be detected and reported back by the ADT7468. Bit 0 of Status
Register 2 (Reg. 0x42) is the 12 V/VC bit and denotes a VID
change when set. The VID code change bit is set when the logic
states on the VID inputs are different than they were 11 μs
previously. The change of VID code can be used to generate an
SMBALERT interrupt. If an SMBALERT interrupt is not
required, Bit 0 of Interrupt Mask Register 2 (Reg. 0x75),
when set, prevents SMBALERTs from occurring on VID
code changes.
reflects VID code changes.
Rev. 3 | Page 15 of 81 | www.onsemi.com
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